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AS4C32M16D2A-25BIN

Name: Alliance Memory AS4C32M16D2A-25BIN
Brand: Alliance Memory
SKU: 913-32M16D2A25BIN
Price: 4.29 EUR
Availability: InStock

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Mouser No:

913-32M16D2A25BIN

Mfr. No:

AS4C32M16D2A-25BIN

Mfr.:

Alliance Memory

Description:

DRAM DDR2, 512Mb, 32M x 16, 1.8V, 84-ball BGA, 400 MHz, Industrial Temp - Tray

Datasheet:

AS4C32M16D2A-25BIN Datasheet (PDF)

ECAD Model:

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Learn more about Alliance Memory AS4C32M16D2A-25BIN

In Stock: 14

Stock:: 14

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On Order:: 418
Factory Lead Time:: 16

Weeks Estimated factory production time for quantities greater than shown.

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Ext. Price:

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Pricing (EUR)

Qty.	Unit Price	Ext. Price
	4,29 €	4,29 €
	4,00 €	40,00 €
	3,88 €	97,00 €
	3,79 €	189,50 €
	3,60 €	360,00 €
	3,51 €	733,59 €
	3,46 €	1.446,28 €
	3,40 €	3.553,00 €

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	Alliance Memory
Product Category:	DRAM
RoHS:
Type:	SDRAM - DDR2
Memory Size:	512 Mbit
Data Bus Width:	16 bit
Maximum Clock Frequency:	400 MHz
Package/Case:	FBGA-84
Organisation:	32 M x 16
Access Time:	400 ps
Supply Voltage - Min:	1.7 V
Supply Voltage - Max:	1.9 V
Minimum Operating Temperature:	- 40 C
Maximum Operating Temperature:	+ 95 C
Series:	AS4C32M16D2A
Packaging:	Tray
Brand:	Alliance Memory
Country of Assembly:	Not Available
Country of Diffusion:	Not Available
Country of Origin:	TW
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	209
Subcategory:	Memory & Data Storage
Supply Current - Max:	100 mA
Unit Weight:	4,557 g

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Datasheet

AS4C32M16D2A-25BIN Datasheet (PDF)

REACH Declaration (PDF)

CNHTS:: 8542329010
USHTS:: 8542320028
JPHTS:: 854232021
KRHTS:: 8542321010
MXHTS:: 8542320201
ECCN:: EAR99

DDR2 SDRAM

Alliance Memory DDR2 SDRAM is designed to comply with DDR2 SDRAM key features. Features such as posted CAS# with additive latency, Write latency=Read latency -1, and On-Die Termination (ODT). All of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with a pair of bidirectional strobes (DQS and DQS#) in a source synchronous fashion. The address bus is used to convey row, column, and bank address information in RAS #, CAS# multiplexing style.