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IS43LR16160G-6BL

Name: ISSI IS43LR16160G-6BL
Brand: ISSI
SKU: 870-IS43LR16160G-6BL
Price: 4.51 EUR
Availability: OutOfStock

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Mouser No:

870-IS43LR16160G-6BL

Mfr. No:

IS43LR16160G-6BL

Mfr.:

ISSI

Description:

DRAM 256M, 1.8V, Mobile DDR, 16Mx16, 166Mhz, 60 ball BGA (8mmx10mm) RoHS

Datasheet:

IS43LR16160G-6BL Datasheet (PDF)

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Availability

Stock:: Non-Stocked

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Factory Lead Time:: 16 Weeks Estimated factory production time.

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Minimum: 300 Multiples: 300

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Pricing (EUR)

Qty.	Unit Price	Ext. Price
	4,51 €	1.353,00 €
	4,46 €	2.676,00 €
	4,42 €	5.304,00 €
	4,37 €	11.799,00 €

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Product Attribute	Attribute Value	Select Attribute
Manufacturer:	ISSI
Product Category:	DRAM
RoHS:
Type:	SDRAM - DDR
Memory Size:	256 Mbit
Data Bus Width:	16 bit
Maximum Clock Frequency:	166 MHz
Package/Case:	BGA-60
Organisation:	16 M x 16
Access Time:	6 ns
Supply Voltage - Min:	1.7 V
Supply Voltage - Max:	1.95 V
Minimum Operating Temperature:	0 C
Maximum Operating Temperature:	+ 70 C
Series:	IS43LR16160G
Packaging:	Tray
Brand:	ISSI
Country of Assembly:	Not Available
Country of Diffusion:	TW
Country of Origin:	CN
Moisture Sensitive:	Yes
Mounting Style:	SMD/SMT
Product Type:	DRAM
Factory Pack Quantity:	300
Subcategory:	Memory & Data Storage
Supply Current - Max:	60 mA
Tradename:	PowerSaver

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Datasheet

IS43LR16160G-6BL Datasheet (PDF)

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CNHTS:: 8542319090
USHTS:: 8542320024
JPHTS:: 854232021
MXHTS:: 8542320201
ECCN:: EAR99

IS43LR16800F 2Mx16 Mobile DDR SDRAM

ISSI IS43LR16800F 2Mx16 Mobile DDR SDRAM is 134,217,728 bits Mobile Double Data Rate (DDR) Synchronous DRAM (SDRAM) organized as 4 banks of 2,097,152 words x 16 bits. This product uses a double-data-rate architecture to achieve high-speed operation. The Data Input/ Output signals are transmitted on a 16-bit bus. The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. This product offers fully synchronous operations referenced to both rising and falling edges of the clock.

Mobile DDR SDRAM

ISSI Mobile DDR SDRAM is organized as 4 banks of 16,777,216 words x 16 bits and uses a double-data-rate architecture to achieve high-speed operation. The Data Input/Output signals are transmitted on a 16-bit bus. The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins. ISSI Mobile DDR SDRAM offers fully synchronous operations referenced to both rising and falling edges of the clock. The data paths are internally pipelined and 2n-bits prefetched to achieve very high bandwidth. All input and output voltage levels are compatible with LVCMOS.